SH7040 Datasheet, PDF (99/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Table 2.10 Classification of Instructions (cont)
Operation
Classification Types Code
Function
System
control
11 CLRT
T bit clear
CLRMAC MAC register clear
LDC
Load to control register
LDS
Load to system register
NOP
No operation
RTE
Return from exception processing
SETT
T bit set
SLEEP Shift into power-down mode
STC
Storing control register data
STS
Storing system register data
TRAPA Trap exception handling
Total: 62
No. of
Instructions
31
142
Table 2.11 shows the format used in tables 2.12 to 2.17, which list instruction codes, operation,
and execution states in order by classification.
61