SH7040 Datasheet, PDF (664/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

• Bit 0—PC0 Mode (PC0MD): Selects the function of the PC0/A0 pin.
Bit 0: PC0MD
0
1
Description
General input/output (PC0) (initial value) (A0 in on-chip ROM invalid mode)
Address output (A0) (PC0 in single chip mode)
18.3.9 Port D I/O Register H (PDIORH)
The port D I/O register H (PDIORH) is a 16-bit read/write register that selects input or output for
the most significant sixteen port D pins. Bits PD31IOR–PD16IOR correspond to the
PD31/D31/ADTRG pin to PD16/D16/IRQ0 pin. PDIORH is enabled when the port D pins
function as general input/outputs (PD31–PD16). For other functions, it is disabled.
For port D pin functions PD31–PD16, a given pin in port D is an output pin if its corresponding
PDIORH bit is set to 1, and an input pin if the bit is cleared to 0.
PDIORH is initialized to H'0000 by external power-on reset; however, it is not initialized for
manual resets, reset by WDT, standby mode, or sleep mode, so the previous data is maintained.
The settings for this register are effective only for the 144-pin version. There are no corresponding
pins for this register in the 112-pin and 120-pin versions. However, read/writes are possible.
Bit:
Initial value:
R/W:
15
PD31
IOR
0
R/W
14
PD30
IOR
0
R/W
13
PD29
IOR
0
R/W
12
PD28
IOR
0
R/W
11
PD27
IOR
0
R/W
10
PD26
IOR
0
R/W
9
PD25
IOR
0
R/W
8
PD24
IOR
0
R/W
Bit:
Initial value:
R/W:
7
PD23
IOR
0
R/W
6
PD22
IOR
0
R/W
5
PD21
IOR
0
R/W
4
PD20
IOR
0
R/W
3
PD19
IOR
0
R/W
2
PD18
IOR
0
R/W
1
PD17
IOR
0
R/W
0
PD16
IOR
0
R/W
626