SH7040 Datasheet, PDF (619/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Table 16.4 A/D Conversion Time (Single Mode)
CKS=0
Notation Min Typ Max Min
A/D conversion start delay time t_D
10
—
Input sampling time
t _SPL
—
64
A/D conversion time
t _CCNV
259 —
Note: Numbers in the table are in states (t_cyc).
17
6
—
—
266 131
CKS=1
Typ Max
—
9
32
—
—
134
16.4.4 External Trigger Input Timing
It is possible to start A/D conversion from an external trigger input. External trigger input is input
from the ADTRG pin or MTU when the TRGE bit of the A/D control register (ADCR) is set to 1.
A/D conversion is started when the ADST bit of the A/D control/status register (ADCSR) is set to
1 by the ADTRG input pin last transition edge or MTU trigger. Other operations, regardless of
whether in the single or scan mode, are the same as when setting the ADST bit to 1 with the
software.
Figure 16.6 shows an example of external trigger input timing.
CK
ADTRG
External trigger
signal
ADST
A/D conversion
Figure 16.6 External Trigger Input Timing
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