SH7040 Datasheet, PDF (207/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Table 10.4 Address Map for On-Chip ROM Ineffective Mode
Address
Space
Memory
Size
Bus Width
H'00000000–H'003FFFFF CS0 space Ordinary space
4 Mbytes 8/16/32 bist^*1
H'00400000–H'007FFFFF CS1 space Ordinary space
4 Mbytes 8/16/32 bits^*2
H'00800000–H'00BFFFFF CS2 space Ordinary space
4 Mbytes 8/16/32 bits^*2
H'00C00000–H'00FFFFFF CS3 space Ordinary space or multiplex 4 Mbytes 8/16/32 bits^*3
I/O space
H'01000000–H'01FFFFFF DRAM space DRAM
16 Mbytes 8/16/32 bits^*2
H'02000000–H'FFFF7FFF Reserved Reserved
H'FFFF8000–H'FFFF87FF
On-chip
peripheral
module
On-chip peripheral module 2 kbytes 8/16 bits
H'FFFF8800–H'FFFFEFFF Reserved Reserved
H'FFFFF000–H'FFFFFFFF On-chip RAM On-chip RAM
4 kbytes 32 bits
Notes: 1. Do not access reserved spaces. Operation cannot be guaranteed if they are accessed.
2. In the single-chip mode, spaces other than on-chip ROM, on-chip RAM and on-chip
peripheral modules are unavailable.
*1 Selected by the mode pin:
8/16 bit when 112 pin and 120 pin.
16/32 bit when 144 pin.
*2 Selected by on-chip register settings.
*3 Ordinary space: selected by on-chip register settings.
Multiplex I/O space: 8/16 bit selected by the A14 bit.
10.2 Description of Registers
10.2.1 Bus Control Register 1 (BCR1)
BCR1 is a 16-bit read/write register that enables access to the MTU control register, selects
multiplex I/O, and specifies the bus size of the CS spaces. With the 112-pin version
(SH7040/SH7042/SH7044), and the 120-pin version (SH7040/SH7042), specify the bus width as
word (16 bits) or less.
Write bits 8–0 of BCR1 during the initialization stage after a power-on reset, and do not change
the values thereafter. In on-chip ROM effective mode, do not access any of the CS spaces until
after completion of register initialization. In on-chip ROM ineffective mode, do not access any CS
space other than CS0 until after completion of register initialization.
BCR1 is initialized by power-on resets to H'200F, but is not initialized by manual resets or
software standbys.
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