SH7040 Datasheet, PDF (443/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

12.7.15 Notes on Compare Match Flags in Complementary PWM Mode
In complementary PWM mode, buffer register compare-match flags can be set only for compare
with three counters (TCNT3, TCNT4, and TCNTS).
Note that when the buffer register set value is dead time (Td), 2Td, TGR3A – Td, or
TGR3A – 2Td, the buffer register compare-match flag may not be set.
Figure 12.91 gives a description when TGR3B is the specified duty setting register, TGR3D the
buffer register with TGR3A – Td as the buffer register set value.
TGR3A
TCDR
(TGR3A –
Td)
TGR3B
TCNT3
TDDR
H'0000
TIOC3A
TIOC3B
TIOC3D
TGF3B
setting
signal
TGF3D
setting
signal _{Point a}
TGR3D
TCNT4
Point b
Point c
TGR3B,
TGR3D
Point d
Point a: TGR3D setting Td
Point b: TGR3D setting TGR3A – Td or TGR3A – 2TD
Point c: TGR3D setting Td or 2Td
Point d: TGR3D setting TGR3A – Td or TGR3A – 2Td, and the setting signal is
not output
Figure 12.91 Special Properties of Compare Match Flag in Complementary PWM Mode
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