SH7040 Datasheet, PDF (614/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

16.4 Operation
The mid-speed converter operates using the continuous comparison method and is equipped with
10-bit resolution. Operations for the single and scan modes are explained below.
16.4.1 Single Mode (SCAN=0)
The single mode is selected when executing A/D conversion for one channel only. A/D conversion
is initiated when the ADST bit of the A/D control/status register is set to 1 by the software or
external trigger input. The ADST bit is held to 1 during the A/D conversion and is automatically
cleared to 0 upon completion.
When conversion is complete, the ADF bit of ADCSR is set to 1. At this time, if the ADIE bit of
ADCSR is 1, ADI interrupt request occurs.
The ADF bit can be cleared by writing 0 after reading ADF=1.
To switch modes or analog input channels during A/D conversion, clear the ADST bit to 0 and
stop A/D conversion to avoid malfunction. After switching (mode/channel change and ADST bit
setting can be made at the same time), set the ADST bit to 1 to restart A/D conversion.
An example of operation when channel 1 (AN1) is selected in the single mode is shown in figure
16.3 (the bit specification in the example is the ADCSR0 register).
1. Set operation mode to single mode (SCAN=0), input channel to AN1 (CH1=0, CH0=1) and
A/D interrupt request to enable (ADIE) then start A/D conversion (ADST=1).
2. When A/D conversion is complete, A/D conversion result is transferred to ADDRB0. At the
same time, ADF=1 will become ADF=0 and the mid-speed converter will standby for
conversion.
3. Since ADF=1 and ADIE=1, ADI interrupt request will occur.
4. The A/D interrupt process routine will start.
5. After reading ADF=1, write 0 to ADF.
6. Read the A/D conversion result (ADDRB0) and process.
7. End A/D interrupt process routine execution. When ADST bit is set to 1, A/D conversion
starts, following steps (2) to (7) above.
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