SH7040 Datasheet, PDF (255/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

11.1.4 Register Configuration
Table 11.2 summarizes the DMAC registers. DMAC has a total of 17 registers. Each channel has
four control registers. One other control register is shared by all channels
Table 11.2 DMAC Registers
Chan-
nel Name
Abbrevi-
Initial
ation
R/W Value
Address
Register Access
Size
Size
0
DMA source address SAR0
R/W Undefined H'FFFF86C0 32 bit 16, 32^*2
register 0
DMA destination
address register 0
DAR0
R/W Undefined H'FFFF86C4 32 bit 16, 32^*2
DMA transfer count DMATCR0 R/W Undefined H'FFFF86C8 32 bit
register 0
16, 32^*3
DMA channel control CHCR0 R/W^*1 H'00000000 H'FFFF86CC 32 bit
register 0
16, 32^*2
1
DMA source address SAR1
R/W Undefined H'FFFF86D0 32 bit 16, 32^*2
register 1
DMA destination
address register 1
DAR1
R/W Undefined H'FFFF86D4 32 bit 16, 32^*2
DMA transfer count DMATCR1 R/W Undefined H'FFFF86D8 32 bit
register 1
16, 32^*3
DMA channel control CHCR1 R/W^*1 H'00000000 H'FFFF86DC 32 bit
register 1
16, 32^*2
2
DMA source address SAR2
R/W Undefined H'FFFF86E0 32 bit 16, 32^*2
register 2
DMA destination
address register 2
DAR2
R/W Undefined H'FFFF86E4 32 bit 16, 32^*2
217