SH7040 Datasheet, PDF (786/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

24.4.3 Standby Mode Application Example
This example describes a transition to standby mode on the falling edge of an NMI signal, and a
cancellation on the rising edge of the NMI signal. The timing is shown in figure 24.1.
When the NMI pin is changed from high to low level while the NMI edge select bit (NMIE) of the
ICR is set to 0 (falling edge detection), the NMI interrupt is accepted. When the NMIE bit is set to
1 (rising edge detection) by an NMI exception service routine, the standby bit (SBY) of the
SBYCR is set to 1, and a SLEEP instruction is executed, standby mode is entered. Thereafter,
standby mode is canceled when the NMI pin is changed from low to high level.
Oscillator
CK
NMI
NMIE
SBY
Oscillation
settling time
NMI Exception
exception service
processing routine
SBY = 1
SLEEP
instruction
Standby Oscillation WDT
mode start
time
time
set
NMI
exception
processing
Figure 24.1 Standby Mode NMI Timing (Application Example)
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