SH7040 Datasheet, PDF (910/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Table C.5 Pin Settings for Multiplex I/O Space
16-Bit Space
Pin Name
8-Bit Space Upper Byte
Lower Byte
CS0–CS2
H
H
H
CS3
L
L
L
RAS^*1
H
H
H
CASHH^*2
H
H
H
CASHL^*2
H
H
H
CASLH^*2
H
H
H
CASLL^*2
H
H
H
RD/WR
H
H
H
AH
Valid
Valid
Valid
RD
RL
L
L
WH
H
H
WRHH
R
H
H
H
WH
H
H
WRHL
RH
H
H
WH
H
H
WRH
RH
H
H
WH
L
H
WRL
RH
H
H
WL
H
L
A21–A0
Address
Address
Address
D31–D24
High-Z
High-Z
High-Z
D23–D16
High-Z
High-Z
High-Z
D15–D8
High-Z
Address/Data
Address
D7–D0
Address/Data Address
Address/Data
Notes: 1. R: Read, W: Write
2. Valid: High output in accordance with AH timing.
*1 L asserted in RAS down mode or refresh mode.
*2 L asserted in refresh mode.
Word/Longword
H
L
H
H
H
H
H
H
Valid
L
H
H
H
H
H
H
L
H
L
Address
High-Z
High-Z
Address/Data
Address/Data
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