SH7040 Datasheet, PDF (411/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

• Example of AC synchronous motor (brushless DC motor) drive waveform output
In complementary PWM mode, a brushless DC motor can easily be controlled using the timer
gate control register (TGCR). Figures 12.55 to 12.58 show examples of brushless DC motor
drive waveforms created using TGCR.
When output phase switching for a 3-phase brushless DC motor is performed by means of
external signals detected with a Hall element, etc., clear the FB bit in TGCR to 0. In this case,
the external signals indicating the polarity position are input to channel 0 timer input pins
TIOC0A, TIOC0B, and TIOC0C (set with PFC). When an edge is detected at pin TIOC0A,
TIOC0B, or TIOC0C, the output on/off state is switched automatically.
When the FB bit is 1, the output on/off state is switched when the UF, VF, or WF bit in TGCR
is cleared to 0 or set to 1.
The drive waveforms are output from the complementary PWM mode 6-phase output pins.
With this 6-phase output, in the case of on output, it is possible to use complementary PWM
mode output and perform chopping output by setting the N bit or P bit to 1. When the N bit or
P bit is 0, level output is selected.
The 6-phase output active level (on output level) can be set with the OLSN and OLSP bits in
the timer output control register (TOCR) regardless of the setting of the N and P bits. When
using this mode, set the 6-phase output waveform to High active (Low active is also permitted
for A masks).
External input TIOC0A pin
TIOC0B pin
TIOC0C pin
6-phase output TIOC3B pin
TIOC3D pin
TIOC4A pin
TIOC4C pin
TIOC4B pin
TIOC4D pin
When BDC = 1, N = 0, P = 0, FB = 0, output active level = high
Figure 12.55 Example of Output Phase Switching by External Input (1)
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