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SH7040 Datasheet, PDF (183/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
8.3.2 Activating Sources
The DTC performs write operations to the DTCSR with either interrupt sources or software as its
activating sources. Each interrupt source is designated by specific DTER bits to determine whether
it becomes an interrupt request to the CPU or a DTC activating source.
When the DISEL bit is 1, an interrupt, established as the DTC activating source, is requested of
the CPU after each data transfer in DRC. When the DISEL bit is a 0, a request is made only after
the completion of a designated number of data transfers. When the activating source interrupt is
requested of the CPU, the corresponding DTER bit is automatically cleared.
In the case of software activation also, when the DISEL bit is a 1, a software DTC activation
interrupt (SWDTCE) is requested of the CPU after each data transfer. When the DISEL bit is a 0,
a request is made only after the completion of a designated number of data transfers. When no
SWDTCE interrupt is requested of the CPU, the SWDTE bit of the DTCSR is automatically
cleared. When a request is made of the CPU, the SWDTE bit is maintained as a 1.
When multiple DTC activating sources occur simultaneously, they are accepted and the DTC is
activated in accordance with the default priority rankings shown in table 8.2.
Figure 8.3 shows a block diagram of activating source control.
IRQ
On-chip
peripheral
Interrupt
requests
Source
flag clear
Interrupt requests
(those not designated as
DMAC activating sources)
DTC
CPU Interrupt requests
(those not designated as
DTC activating sources)
DMAC
DTER
INTC
Clear
DTC activation request
Source flag clear
DTC
control
Figure 8.3 Activating Source Control Block Diagram
8.3.3 DTC Vector Table
Figure 8.4 shows the correspondence between DTC vector addresses and register information
placement. For each DTC activating source there are 2 bytes in the DTC vector table, which
contain the register information start address.
Table 8.2 shows the correspondence between activating sources and vector addresses. When
activating with software, the vector address is calculated as H'0400 + DTVEC[7:0].
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