SH7040 Datasheet, PDF (598/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

15.4.8 Conversion Start by External Input
A/D conversions can be started by trigger signals generated by timer conversion start triggers or
ADTRG inputs. When a trigger signal designated by the TRGS1 and TRGS0 bits of the ADCR
occurs, the ADST bit of the ADCSR is set to 1 and A/D conversion is started.
The other operations are the same as when the ADST bit is set to 1 by software. Figure 15.12
shows an example of the timing when the ADST bit is set by an external input.
ADTRG
(external
trigger)
Set
ADF
ADST
Channel 0 ^{Conversion standby}
Channel 1
Conver-
sion
standby
Sam-
pling 1
A/D
conver-
sion 1
Conversion
standby
Channel 2 Conversion standby
Channel 3 ^{Conversion standby}
ADDRA
ADDRB
Conversion result 1
ADDRC
ADDRD
Figure 15.12 Conversion Start by ADTRG Conversion Start Trigger
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