SH7040 Datasheet, PDF (907/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Table C.3 Pin Settings for On-Chip Peripheral Modules
On-Chip Peripheral Module
16-Bit Space
Pin Name
On-Chip
ROM
On-Chip
RAM
8-Bit Space
Upper
Byte
Lower
Byte
Word/
Longword
CS0–CS3
H
H
H
H
H
H
RAS^*1
H
H
H
H
H
H
CASHH^*2
H
H
H
H
H
H
CASHL^*2
H
H
H
H
H
H
CASLH^*2
H
H
H
H
H
H
CASLL^*2
H
H
H
H
H
H
RD/WR
H
H
H
H
H
H
AH
L
L
L
L
L
L
RD
R
H
H
H
H
H
H
W
—
H
H
H
H
H
WRHH
R
H
H
H
H
H
H
W
—
H
H
H
H
H
WRHL
R
H
H
H
H
H
H
W
—
H
H
H
H
H
WRLH
R
H
H
H
H
H
H
W
—
H
H
H
H
H
WRLL
R
H
H
H
H
H
H
W
—
H
H
H
H
H
A21–A0
Address Address Address
Address Address Address
D31–D24
High-Z
High-Z High-Z
High-Z High-Z High-Z
D23–D16
High-Z
High-Z High-Z
High-Z High-Z High-Z
D15–D8
High-Z
High-Z High-Z
High-Z High-Z High-Z
D7–D0
High-Z
High-Z High-Z
High-Z High-Z High-Z
Notes: R: Read, W: Write
*1 L asserted in RAS down state or refresh state.
*2 L asserted in refresh state.
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