SH7040 Datasheet, PDF (455/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

(4) Operation when Error Occurs during Normal Mode Operation, and Operation is
Restarted in Phase Counting Mode: Figure 12.99 shows an explanatory diagram of the case
where an error occurs in normal mode and operation is restarted in phase counting mode after re-
setting.
MTU output
1
2
3
RESET TMDR TOER
(normal) (1)
4
TIOR
(1 init
0 out)
5
6
PFC TSTR
(MTU) (1)
7
8
9
10 11
Match Error PFC TSTR TMDR
occurs (PORT) (0) (PCM)
12
TIOR
(1 init
0 out)
13
PFC
(MTU)
14
TSTR
(1)
TIOC*A
TIOC*B
Port output
PEn
High-Z
PEn
High-Z
n=0 to 15
Figure 12.99 Error Occurrence in Normal Mode, Recovery in Phase Counting Mode
1 to 10 are the same as in figure 12.96.
11. Set phase counting mode.
12. Initialize the pins with TIOR.
13. Set MTU output with the PFC.
14. Operation is restarted by TSTR.
Note: Phase counting mode can only be set for channels 1 and 2, and therefore TOER setting is
not necessary.
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