SH7040 Datasheet, PDF (357/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

• Bit 6—Brushless DC Motor (BDC): Selects gate signal output/chopping output function for
brushless DC motor control.
Bit 6: BDC
0
1
Description
Ordinary output (initial value)
Gate signal/chopping output for brushless DC motor
• Bit 5—Reverse Phase Output (N): Selects whether to output gate signals directly to the reverse
phase pin (TIOC3D, TIOC4C, and TIOC4D) output, or to output by chopping the gate signal
and the complementary PWM/reset-synchronized PWM output.
Bit 5: N
0
1
Description
Output gate signals directly to reverse phase pin output (initial value)
Output chopped gate signal and complementary PWM /reset-
synchronized PWM output to reverse phase pin output
• Bit 4—Positive Phase Output (P): Selects whether to output gate signals directly to the positive
phase pin (TIOC3B, TIOC4A, and TIOC4B) output, or to output by chopping the gate signal
and the complementary PWM/reset-synchronized PWM output.
Bit 4: P
0
1
Description
Output gate signals directly to positive phase pin output (initial value)
Output chopped gate signal and complementary PWM /reset-
synchronized PWM output to positive phase pin output
• Bit 3—Feedback Input (FB): Selects whether to use external input or register input for the
feedback input to generate gate signals.
Bit 3: FB
0
1
Description
Feedback input is external input (initial value)
(Input sources are channel 0 TGRA, TGRB, TGRC input capture signals)
Feedback input is register input (TGCR’s UF, VF, WF settings)
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