SH7040 Datasheet, PDF (358/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

• Bits 2–0—Output Phase Switch 2–0 (WF, VF, UF): These bits set the positive phase/negative
phase output phase on or off state. The setting of these bits is valid only when the FB bit in this
register is set to 1. In this case, the setting of bits 2–0 is a substitute for external input.
Function
TIOC3B TIOC4A TIOC4B TIOC3D TIOC4C TIOC4D
Bit 2: Bit 1: Bit 0: U
V
W
U
V
W
WF
VF
UF
Phase Phase Phase Phase Phase Phase
0
0
0
Off
Off
Off
Off
Off
Off
Initial value
1
On
Off
Off
Off
Off
On
—
1
0
Off
On
Off
On
Off
Off
—
1
Off
On
Off
Off
Off
On
—
1
0
0
Off
Off
On
Off
On
Off
—
1
On
Off
Off
Off
On
Off
—
1
0
Off
Off
On
On
Off
Off
—
1
Off
Off
Off
Off
Off
Off
—
12.2.13 Timer Subcounter (TCNTS)
The timer subcounter (TCNTS) is a 16-bit read-only counter that is used only in complementary
PWM mode. The TCNTS counter is initialized to H'00 by a power-on reset or in standby mode.
Manual reset does not initialize TCNTS. Accessing the TCNTS counter in 8-bit units is
prohibited. Always access in 16-bit units.
Bit: 15
14
13
12
11
10
9
8
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
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