SH7040 Datasheet, PDF (548/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Initialization
1
Start reception
Read ORER, PER, and
FER bits in SSR
PER, FER,
ORER = 1?
No
Yes
2
Error handling
Read the RDRF bit in SSR
3
No
RDRF = 1?
Yes
Read reception data of RDR and
clear RDRF bit in SSR to 0
4
No
All data received?
Yes
Clear the RE bit of SCR to 0
End reception
Figure 14.7 Sample Flowchart for Receiving Serial Data (1)
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