SH7040 Datasheet, PDF (35/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Section 21 128kB PROM................................................................................................... 669
21.1 Overview............................................................................................................................ 669
21.2 PROM Mode...................................................................................................................... 670
21.2.1 PROM Mode Settings........................................................................................... 670
21.2.2 Socket Adapter Pin Correspondence and Memory Map ...................................... 670
21.3 PROM Programming ......................................................................................................... 674
21.3.1 Programming Mode Selection .............................................................................. 674
21.3.2 Write/Verify and Electrical Characteristics.......................................................... 675
21.3.3 Cautions on Writing ............................................................................................. 679
21.3.4 Post-Write Reliability........................................................................................... 680
Section 22 256kB Flash Memory (F-ZTAT) ............................................................... 681
22.1 Features .............................................................................................................................. 681
22.2 Overview............................................................................................................................ 682
22.2.1 Block Diagram...................................................................................................... 682
22.2.2 Mode Transition Diagram..................................................................................... 683
22.2.3 Onboard Program Mode ....................................................................................... 684
22.2.4 Flash Memory Emulation in RAM....................................................................... 686
22.2.5 Differences between Boot Mode and User Program Mode.................................. 687
22.2.6 Block Configuration ............................................................................................. 688
22.3 Pin Configuration............................................................................................................... 689
22.4 Register Configuration....................................................................................................... 689
22.5 Description of Registers..................................................................................................... 690
22.5.1 Flash Memory Control Register 1 (FLMCR1)..................................................... 690
22.5.2 Flash Memory Control Register 2 (FLMCR2)..................................................... 692
22.5.3 Erase Block Register 1 (EBR1) ............................................................................ 695
22.5.4 Erase Block Register 2 (EBR2) ............................................................................ 695
22.5.5 RAM Emulation Register (RAMER) ................................................................... 696
22.6 On-Board Programming Mode .......................................................................................... 698
22.6.1 Boot Mode ............................................................................................................ 699
22.6.2 User Program Mode ............................................................................................. 703
22.7 Programming/Erasing Flash Memory................................................................................ 704
22.7.1 Program Mode (n = 1 for Addresses H'0000–H'1FFFF,
n = 2 for Addresses H'20000–H'3FFFF)............................................................... 704
22.7.2 Program-Verify Mode (n = 1 for Addresses H'0000–H'1FFFF,
n = 2 for Addresses H'20000–H'3FFFF)............................................................... 705
22.7.3 Erase Mode (n = 1 for Addresses H'0000–H'1FFFF,
n = 2 for Addresses H'20000–H'3FFFF)............................................................... 711
22.7.4 Erase-Verify Mode (n = 1 for Addresses H'00000–H'1FFFF,
n = 2 for Addresses H'20000–H'3FFFF)............................................................... 712
22.8 Protection........................................................................................................................... 718
22.8.1 Hardware Protection............................................................................................. 718
22.8.2 Software Protection .............................................................................................. 719
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