SH7040 Datasheet, PDF (158/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Module bus
Bus
interface
UBBR
UBAMRH
UBAMRL
UBARH
UBARL
Break condition comparator
User break
interrupt
generating
circuit
UBC
UBARH, UBARL: User break address registers H, L
UBAMRH, UBAMRL: User break address mask registers H, L
UBBR: User break bus cycle register
Interrupt request
Interrupt controller
Figure 7.1 User Break Controller Block Diagram
7.1.3 Register Configuration
The UBC has the five registers shown in table 7.1. Break conditions are established using these
registers.
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