SH7040 Datasheet, PDF (754/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

AND.B
EWait_4 SUBC
BF
;
MOV.L
AND.B
EWait_5 SUBC
BF
;
MOV.L
MOV.W
MOV.W
;
MOV.L
OR.B
EWait_6 SUBC
BF
;
MOV.L
BlockVerify_1
MOV.L
MOV.L
MOV.L
EWait_7 SUBC
BF
;
MOV.L
CMP/EQ
BF
MOV.L
CMP/EQ
BF
MOV.L
AND.B
EWait_8 SUBC
BF
;
716
#ECLEAR,@(R0,GBR)
R2,R3
EWait_4
#Wait10u,R3
#ESUCLEAR,@(R0,GBR)
R2,R3
EWait_5
#WDT_TCSR,R1
#H’A55F,R3
R3,@R1
#Wait20u,R3
#EVSET,@(R0,GBR)
R2,R3
EWait_6
@R5,R6
.EQU
$
#H’FFFFFFFF,R8
R8,@R6
#Wait2u,R3
R2,R3
EWait_7
@R6+,R1
R8,R1
BlockVerify_NG
@(8,R5),R7
R6,R7
BlockVerify_1
#Wait5u,R3
#EVCLEAR,@(R0,GBR)
R2,R3
EWait_8
; Clear E
; Wait 10 µs
; Clear ESU
; Wait 10 µs
; Disable WDT
; Set EV
; Wait 20 µs
; Erase memory block start address -> R6
; Erase-verify
; H'FF dummy write
; Read verify data
; Check for last address of memory block
; Clear EV
; Wait 5 µs