English
Language : 

SH7040 Datasheet, PDF (776/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
Table 22.20 Status Polling Output Truth Table
Pin Name
I/O7
I/O6
I/O5–0
During Internal
Operation
Abnormal End
0
1
0
0
0
1
0
0
0
Normal End
1
1
0
22.11.8 Programmer Mode Transition Time
Commands cannot be accepted during the oscillation stabilization period or the programmer mode
setup period. After the programmer mode setup time, a transition is made to memory read mode.
Table 22.21 Stipulated Transition Times to Command Wait State
Item
Standby release
(oscillation stabilization time)
Programmer mode setup time
VCC hold time
Symbol Min
t OSC1
10
t bmv
10
t dwn
0
Max
Unit
ms
ms
ms
Notes
VCC
tOSC1
Memory read
mode
Command wait state
Command Automatic write mode Normal/abnormal
tbmv wait state Automatic erase mode complete verify tdwn
RES
FWE
Note : For the level of FWE input pin, set VIL when using other than the automatic write mode
and automatic erase mode.
Figure 22.28 Oscillation Stabilization Time and Boot Program Transfer Time
738