English
Language : 

SH7040 Datasheet, PDF (78/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
Table 1.7 Pin Functions (cont)
Classification Symbol I/O
Bus control
TIOC3A I/O
multifunction
TIOC3B
timer/pulse unit
(cont)
TIOC3C
TIOC3D
TIOC4A I/O
TIOC4B
TIOC4C
TIOC4D
Direct memory DREQ0– I
access
DREQ1
controller
(DMAC)
DRAK0– O
DRAK1
DACK0– O
DACK1
Serial
TxD0–
O
communication TxD1
interface (SCI)
RxD0–
I
RxD1
A/D Converter
SCK0–
I/O
SCK1
AVCC
I
AVSS
I
AVref
I
(QFP-144
only)
AN0–AN7 I
ADTRG I
Name
MTU input
capture/output
compare
(channel 3)
Function
Channel 3 input capture input/output
compare output/PWM output pins.
MTU input
capture/output
compare
(channel 4)
Channel 4 input capture input/output
compare output/PWM output pins.
DMA transfer
request
(channels 0, 1)
Input pin for external requests for
DMA transfer.
DREQ request
acknowledgment
(channels 0, 1)
DMA transfer
strobe (channels
0, 1)
Transmit data
(channels 0, 1)
Receive data
(channels 0, 1)
Serial clock
(channels 0, 1)
Analog supply
Analog ground
Analog reference
supply
Analog input
A/D conversion
trigger input
Output the input sampling
acknowledgment of external DMA
transfer requests.
Output a strobe to the external I/O of
external DMA transfer requests.
SCI0, SCI1 transmit data output pins.
(TxD1 is used for data transfer during
boot mode of F-ZTAT)
SCI0, SCI1 receive data input pins.
(RxD1 is used for data transfer during
boot mode of F-ZTAT)
SCI0, SCI1 clock input/output pins.
Analog supply; connected to VCC.
Analog supply; connected to VSS.
Analog reference supply input pin.
(Connected to AVCC internally in
QFP-112 and TQFP-120.)
Analog signal input pins.
External trigger input for A/D
conversion start.
40