SH7040 Datasheet, PDF (136/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

5.8 Notes on Use
5.8.1 Value of Stack Pointer (SP)
The value of the stack pointer must always be a multiple of four. If it is not, an address error will
occur when the stack is accessed during exception processing.
5.8.2 Value of Vector Base Register (VBR)
The value of the vector base register must always be a multiple of four. If it is not, an address error
will occur when the stack is accessed during exception processing.
5.8.3 Address Errors Caused by Stacking of Address Error Exception Processing
When the stack pointer is not a multiple of four, an address error will occur during stacking of the
exception processing (interrupts, etc.) and address error exception processing will start up as soon
as the first exception processing is ended. Address errors will then also occur in the stacking for
this address error exception processing. To ensure that address error exception processing does not
go into an endless loop, no address errors are accepted at that point. This allows program control
to be shifted to the address error exception service routine and enables error processing.
When an address error occurs during exception processing stacking, the stacking bus cycle (write)
is executed. During stacking of the status register (SR) and program counter (PC), the SP is –4 for
both, so the value of SP will not be a multiple of four after the stacking either. The address value
output during stacking is the SP value, so the address where the error occurred is itself output.
This means the write data stacked will be undefined.
98