SH7040 Datasheet, PDF (202/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

10.1.2 Block Diagram
Figure 10.1 shows the BSC block diagram.
WAIT
CS0 to CS3
AH
RD
RDWR
WRHH, WRHL
WRH, WRL
CASHH, CASHL
CASH, CASL
RAS
CMI interrupt request
Wait
control
unit
Area
control
unit
Memory
control
unit
Bus
interface
WCR1
WCR2
BCR1
BCR2
DCR
RTCSR
RTCNT
Comparator
Interrupt
controller
WCR1: Wait control register 1
WCR2: Wait control register 2
BCR1: Bus control register 1
BCR2: Bus control register 2
RTCOR
BSC
DCR: DRAM area control register
RTCNT: Refresh timer counter
RTCOR: Refresh timer constant register
RTSCR: Refresh timer control/status register
Figure 10.1 BSC Block Diagram
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