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SH7040 Datasheet, PDF (39/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
Section 1 SH7040 Series Overview
1.1 SH7040 Series Overview
The SH7040 Series (SH7040/41/42/43/44/45) CMOS single-chip microprocessors integrate a
Renesas-original architecture, high-speed CPU with peripheral functions required for system
configuration.
The CPU has a RISC-type instruction set. Most instructions can be executed in one clock cycle,
which greatly improves instruction execution speed. In addition, the 32-bit internal-bus
architecture enhances data processing power. With this CPU, it has become possible to assemble
low cost, high performance/high-functioning systems, even for applications that were previously
impossible with microprocessors, such as real-time control, which demands high speeds. In
particular, the SH7040 series has a 1-kbyte on-chip cache, which allows an improvement in CPU
performance during external memory access.
In addition, the SH7040 Series includes on-chip peripheral functions necessary for system
configuration, such as large-capacity ROM and RAM, timers, a serial communication interface
(SCI), an A/D converter, an interrupt controller, and I/O ports. Memory or peripheral LSIs can be
connected efficiently with an external memory access support function. This greatly reduces
system cost.
In addition to the masked-ROM versions of the SH7040 series, the SH7042 and SH7043 have a
ZTAT™*1 version with user-programmable on-chip PROM and the SH7044 and SH7045 have an
F-ZTATTM*2 version with on-chip flash memory. These versions enable users to respond quickly
and flexibly to changing application specifications, growing production volumes, and other
conditions.
Notes: *1 ZTAT (Zero Turn-Around Time) is a registered trademark of Renesas Technology
Corp.
*2 F-ZTAT (Flexible ZTAT) is a trademark of Renesas Technology Corp.
1.1.1 SH7040 Series Features
CPU:
• Original Renesas architecture
• 32-bit internal data bus
• General-register machine
 Sixteen 32-bit general registers
 Three 32-bit control registers
 Four 32-bit system registers
• RISC-type instruction set
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