SH7040 Datasheet, PDF (569/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Initialization
1
Start transmitting/receive
Read TDRE bit in SSR
2
No
TDRE = 1?
Yes
Write transmission data in TDR
and clear TDRE bit of SSR to 0
Read ORER bit of SSR
ORER = 1?
No
Read RDRF bit of SSR
Yes
3
Error handling
4
No
RDRF = 1?
Yes
Read receive data of RDR,
and clear RDRF bit of SSR to 0 ⁵
All
No
data transmitted/and
received
Yes
Clear TE and RE bits of SCR to 0
End transmission/reception
Figure 14.23 Sample Flowchart for Serial Transmission
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