SH7040 Datasheet, PDF (481/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

12.9 Port Output Enable (POE)
The port output enable (POE) can be used to establish a high-impedance state for high-current
pins, by changing the POE0–POE3 pin input, depending on the output status of the high-current
pins (PE09/TIOC3B, PE11/TIOC3D, PE12/TIOC4A, PE13/TIOC4B/MRES,
PE14/TIOC4C/DACK0/AH, PE15/TIOC4D/DACK1/IRQOUT). It can also simultaneously
generate interrupt requests.
The high-current pins also become high-impedance regardless of whether these pin functions are
selected in cases such as when the oscillator stops or in standby mode. Refer to section 4, Clock
Pulse Generator (CPG), for details.
12.9.1 Features
• Each of the POE0–POE3 input pins can be set for falling edge, φ/8 × 16, φ/16 × 16, or φ/128 ×
16 low-level sampling.
• High-current pins can be set to high-impedance state by POE0–POE3 pin falling-edge or low-
level sampling.
• High-current pins can be set to high-impedance state when the high-current pin output levels
are compared and simultaneous low-level output continues for one cycle or more (except in the
33.3 MHz version).
• Interrupts can be generated by input-level sampling or output-level comparison results.
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