SH7040 Datasheet, PDF(494/923 Page) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

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SH7040 Datasheet, PDF (494/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

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13.1.2 Block Diagram

Figure 13.1 is the block diagram of the WDT.

ITI

(interrupt

signal)

WDTOVF

Internal

reset signal*

Interrupt

control

Overflow

Reset

control

Clock

Clock

select

Ï/2

Ï/64

Ï/128

Ï/256

Ï/512

Ï/1024

Ï/4096

Ï/8192

Internal

clock sources

RSTCSR

TCNT

TCSR

Module bus

Bus

interface

WDT

TCSR: Timer control/status register

TCNT: Timer counter

RSTCSR: Reset control/status register

Note: * The internal reset signal can be generated by setting the register.

The type of reset can be selected (power-on or manual).

Figure 13.1 WDT Block Diagram

13.1.3 Pin Configuration

Table 13.1 shows the pin configuration.

Table 13.1 Pin Configuration

Pin

Abbreviation I/O

Watchdog timer overflow WDTOVF

O

Function

Outputs the counter overflow signal in the

watchdog timer mode

456

▷