SH7040 Datasheet, PDF (486/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

• Bits 5 and 4—POE2 Mode 1, 0 (POE2M1 and POE2M0): These bits select the input mode of
the POE2 pin.
Bit 5:
POE2M1
0
1
Bit 4:
POE2M0
0
1
0
1
Description
Accept request on falling edge of POE2 input. (initial value)
Accept request when POE2 input has been sampled for 16
φ/8 clock pulses, and all are low level.
Accept request when POE2 input has been sampled for 16
φ/16 clock pulses, and all are low level.
Accept request when POE2 input has been sampled for 16
φ/128 clock pulses, and all are low level.
• Bits 3 and 2—POE1 Mode 1, 0 (POE1M1 and POE1M0): These bits select the input mode of
the POE1 pin.
Bit 3:
POE1M1
0
1
Bit 2:
POE1M0
0
1
0
1
Description
Accept request on falling edge of POE1 input. (initial value)
Accept request when POE1 input has been sampled for 16
φ/8 clock pulses, and all are low level.
Accept request when POE1 input has been sampled for 16
φ/16 clock pulses, and all are low level.
Accept request when POE1 input has been sampled for 16
φ/128 clock pulses, and all are low level.
• Bits 1 and 0—POE0 Mode 1, 0 (POE0M1 and POE0M0): These bits select the input mode of
the POE0 pin.
Bit 1:
POE0M1
0
1
Bit 0:
POE0M0
0
1
0
1
Description
Accept request on falling edge of POE0 input. (initial value)
Accept request when POE0 input has been sampled for 16
φ/8 clock pulses, and all are low level.
Accept request when POE0 input has been sampled for 16
φ/16 clock pulses, and all are low level.
Accept request when POE0 input has been sampled for 16
φ/128 clock pulses, and all are low level.
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