SH7040 Datasheet, PDF (838/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

26.3.4 Direct Memory Access Controller Timing
Table 26.8 Direct Memory Access Controller Timing (Conditions: V_CC = 3.0^* to 3.6V, AV_CC
= 3.0^* to 3.6V, AV_CC = V_CC ± 10%, AV_ref = 3.0^* to AV_CC, V_SS = AV_SS = 0V, T_a =
–20 to +75°C)
Item
Symbol Min
DREQ0, DREQ1 setup time
DREQ0, DREQ1 hold time
DREQ0, DREQ1 pulse width
t _DRQS
35
t _DRQH
35
t _DRQW
1.5
DRAK output delay time
t _DRAKD
—
Note: * SH7042/43 ZTAT (excluding A mask) are 3.2V.
Max
—
—
—
35
Unit
ns
ns
t _cyc
ns
Figure
26.20
26.21
26.22
CK
DREQ0
DREQ1
Level
DREQ0
DREQ1
Edge
DREQ0
DREQ1
Level clear
t_DRQS
t_DRQS
t_DRQH
t_DRQS
Figure 26.20 DREQ0 and DREQ1 Input Timing (1)
800