SH7040 Datasheet, PDF (314/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Table 12.1 MTU Functions (cont)
Item
Channel 0 Channel 1 Channel 2 Channel 3 Channel 4
Hard DTC
activation
TGR compare- TGR compare- TGR compare- TGR compare- TGR compare-
match or input match or input match or input match or input match or input
capture
capture
capture
capture
capture and
TCNT4
overflow/
underflow
A/D conversion start TGR0A com- TGR1A com- TGR2A com- TGR3A com- TGR4A com-
trigger
pare match or pare match or pare match or pare match or pare match or
input capture input capture input capture input capture input capture
Interrupt sources
Compare
match/input
capture 0A
Compare
match/input
capture 1A
Compare
match/input
capture 2A
Compare
match/input
capture 3A
Compare
match/input
capture 4A
Compare
match/input
capture 0B
Compare
match/input
capture 1B
Compare
match/input
capture 2B
Compare
match/input
capture 3B
Compare
match/input
capture 4B
Compare
match/input
capture 0C
Overflow
Overflow
Compare
match/input
capture 3C
Compare
match/input
capture 4C
Compare
match/input
capture 0D
Underflow
Underflow
Compare
match/input
capture 3D
Compare
match/input
capture 4D
Overflow
—
—
Overflow
Overflow/
underflow
12.1.2 Block Diagram
Figure 12.1 is the block diagram of the MTU.
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