SH7040 Datasheet, PDF (329/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Channel 0 (TIOR0H Register):
• Bits 7–4—I/O Control B3–B0 (IOB3–IOB0): These bits set the TGR0B register function.
Bit 7: Bit 6: Bit 5: Bit 4:
IOB3 IOB2 IOB1 IOB0 Description
0
0
0
0
TGR0B
Output disabled (initial value)
1
is an
Initial
Output 0 on compare-match
1
0
output
output
Output 1 on compare-match
1
compare
is 0
Toggle output on compare-match
1
0
0
register
Output disabled
1
Initial
Output 0 on compare-match
1
0
output
Output 1 on compare-match
1
is 1
Toggle output on compare-match
1
0
0
0
TGR0B
Capture
Input capture on rising edge
1
is an
input source
Input capture on falling edge
1
0
input
is the
Input capture on both edges
1
capture
TIOC0B pin
1
0
0
register
Capture
Input capture
1
input source
on TCNT1
1
0
is channel 1/ count up/count down
1
count clock
291