SH7040 Datasheet, PDF (473/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

(22) Operation when Error Occurs during Complementary PWM Mode Operation, and
Operation is Restarted in PWM Mode 1: Figure 12.117 shows an explanatory diagram of the
case where an error occurs in complementary PWM mode and operation is restarted in PWM
mode 1 after re-setting.
MTU output
1
2
3
4
RESET TOCR TMDR TOER
(CPWM) (1)
5
PFC
(MTU)
6
TSTR
(1)
7
8
9
10
11
12
13
Match Error PFC TSTR TMDR TIOR PFC
occurs (PORT) (0) (PWM1) (1 init (MTU)
0 out)
14
TSTR
(1)
TIOC3A
TIOC3B
• Not initialized (TIOC3B)
TIOC3D
• Not initialized (TIOC3D)
Port output
PE8
High-Z
PE9
High-Z
PE11
High-Z
Figure 12.117 Error Occurrence in Complementary PWM Mode, Recovery in PWM
Mode 1
1 to 10 are the same as in figure 12.116.
11. Set PWM mode 1. (MTU output goes low.)
12. Initialize the pins with TIOR. (In PWM mode 1, the TIOC *B side is not initialized.)
13. Set MTU output with the PFC.
14. Operation is restarted by TSTR.
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