SH7040 Datasheet, PDF (15/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Section
Page
25.3.3 Bus Timing 764
Figure 25.14 DRAM
Cycle (Normal Mode,
3 Waits, TPC=1,
RCD=1)
Description
Figure amended
Tcw1
Tcw2
Column
t_CASD1
25.3.5 Multifunction 770
Timer Pulse Unit
Timing
Figure 25.23 MTU
I/O Timing
t_CAC
t_AA
Figure amended
t_TOCD
Figure 25.24 MTU 770
Clock Input Timing
Figure amended
t_TCKS
25.3.11 Measuring 778
Conditions for AC
Characteristics
Figure 25.33 Output
Load Circuit
Title amended
Output Load Circuit