SH7040 Datasheet, PDF (752/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

• Sample one-block erase program
The wait time set values (number of loops) are for the case where f = 28.7 MHz. For other
frequencies, the set value is given by the following expression:
Wait time (µS) × f (MHz) ÷ 4
The WDT overflow cycle set value is for the case where f = 28.7 MHz. For other frequencies,
ensure that the overflow cycle is a minimum of 5.3 ms.
Registers Used
R5 (input):
R7 (output):
R0-3, 6, 8-9:
Memory block table pointer
OK (normal) or NG (error)
Work registers
FLMCR1
FLMCR2
EBR1
EBR2
Wait10u
Wait2u
Wait200u
Wait5m
Wait20u
Wait5u
WDT_TCSR
WDT_9m
SWESET
ESUSET
ESET
ECLEAR
ESUCLEAR
EVSET
EVCLEAR
SWECLEAR
MAXErase
;
FlashErase
MOV.L
LDC
MOV.L
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
H’80
H’81
H’82
H’83
72
14
1435
35875
144
36
H’FFFF8610
H’A57D
B’01000000
B’00100000
B’00000010
B’11111101
B’11011111
B’00001000
B’11110111
B’10111111
60
.EQU
$
#H’FFFF8500,R0
R0,GBR
#1,R2
; Initialize GBR
714