SH7040 Datasheet, PDF (561/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Figure 14.17 is a sample flowchart for initializing the SCI.
1. Select the clock source in the serial control register (SCR). Leave RIE, TIE, TEIE, MPIE, TE,
and RE cleared to 0.
2. Select the communication format in the serial mode register (SMR).
3. Write the value corresponding to the bit rate in the bit rate register (BRR) unless an external
clock is used.
4. Wait for at least the interval required to transmit or receive one bit, then set TE or RE in the
serial control register (SCR) to 1. Also set RIE, TIE, TEIE, and MPIE. The TxD, RxD pins
becomes usable in response to the PFC corresponding bits and the TE, RE bit settings.
Start of initialization
Clear TE and RE bits to 0 in SCR
Set RIE, TIE, TEIE, MPIE, CKE1,
and CKE0 bits in SCR
1
(TE and RE are 0)
Select transmit/receive
format in SMR
2
Set value in BRR
3
Wait
No
1-bit interval elapsed?
Yes
Set TE and RE to 1 in SCR;
Set RIE, TIE, TEIE, and MPIE bits ⁴
End
Figure 14.17 Sample Flowchart for SCI Initialization
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