SH7040 Datasheet, PDF (463/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

(12) Operation when Error Occurs during PWM Mode 1 Operation, and Operation is
Restarted in Reset-Synchronous PWM Mode: Figure 12.107 shows an explanatory diagram of
the case where an error occurs in PWM mode 1 and operation is restarted in reset-synchronous
PWM mode after re-setting.
MTU output
1
2
3
4
RESET TMDR TOER TIOR
(PWM1) (1) (1 init
0 out)
5
6
PFC TSTR
(MTU) (1)
7
Match
8
9
Error PFC
occurs (PORT)
10
11
12
13
14
TSTR TMDR TIOR TIOR TOER
(0) (normal) (0 init (disabled) (0)
0 out)
15
16
17
TOCR TMDR TOER
(RPWM) (1)
18
PFC
(MTU)
19
TSTR
(1)
TIOC3A
TIOC3B
• Not initialized (TIOC3B)
TIOC3D
• Not initialized (TIOC3D)
Port output
PE8
PE9
High-Z
High-Z
PE11
High-Z
Figure 12.107 Error Occurrence in PWM Mode 1, Recovery in Reset-Synchronous
PWM Mode
1 to 14 are the same as in figure 12.106.
15. Select the reset-synchronous PWM output level and cyclic output enabling/disabling with
TOCR.
16. Set reset-synchronous PWM.
17. Enable channel 3 and 4 output with TOER.
18. Set MTU output with the PFC.
19. Operation is restarted by TSTR.
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