SH7040 Datasheet, PDF (475/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

(23b) Operation when Error Occurs during Complementary PWM Mode Operation, and
Operation is Restarted in Complementary PWM Mode: Figure 12.119 shows an explanatory
diagram of the case where an error occurs in complementary PWM mode and operation is
restarted in complementary PWM mode after re-setting (when operation is restarted using
completely new cycle and duty settings).
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
RESET TOCR TMDR TOER PFC TSTR Match Error PFC TSTR TMDR TOER TOCR TMDR TOER PFC TSTR
(CPWM) (1) (MTU) (1)
occurs (PORT) (0) (normal) (0)
(CPWM) (1) (MTU) (1)
MTU output
TIOC3A
TIOC3B
TIOC3D
Port output
PE8
PE9
PE11
High-Z
High-Z
High-Z
Figure 12.119 Error Occurrence in Complementary PWM Mode, Recovery in
Complementary PWM Mode
1 to 10 are the same as in figure 12.116.
11. Set normal mode and make new settings. (MTU output goes low.)
12. Disable channel 3 and 4 output with TOER.
13. Select the complementary PWM mode output level and cyclic output enabling/disabling with
TOCR.
14. Set complementary PWM.
15. Enable channel 3 and 4 output with TOER.
16. Set MTU output with the PFC.
17. Operation is restarted by TSTR.
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