SH7040 Datasheet, PDF(423/923 Page) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

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SH7040 Datasheet, PDF (423/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

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12.6.2 Interrupt Signal Timing

Setting TGF Flag Timing during Compare-Match: Figure 12.69 shows timing for the TGF flag

of the timer status register (TSR) due to compare-match, as well as TGI interrupt request signal

timing.

Ï

TCNT

input clock

TCNT

N

N+1

TGR

N

Compare-

match signal

TGF flag

TGI interrupt

Figure 12.69 TGI Interrupt Timing (Compare Match)

Setting TGF Flag Timing during Input Capture: Figure 12.70 shows timing for the TGF flag

of the timer status register (TSR) due to input capture, as well as TGI interrupt request signal

timing.

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