SH7040 Datasheet, PDF (806/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

25.3.4 Direct Memory Access Controller Timing
Table 25.8 Direct Memory Access Controller Timing (Conditions: V_CC = 5.0 V ± 10%,
AV_CC = 5.0 V ± 10%, AV_CC = V_CC ± 10%, AV_ref = 4.5 V to AV_CC, V_SS = AV_SS = 0
V, Ta = – 20 to +75°C)
Item
Symbol Min
DREQ0 and DREQ1 setup time t_DRQS
18
DREQ0 and DREQ1 hold time t_DRQH
18
DREQ0 and DREQ1 pulse width t_DRQW
1.5
DRAK output delay time
t _DRAKD
—
Max
—
—
—
18
Unit
ns
ns
t _cyc
ns
Figure
25.20
25.21
25.22
CK
DREQ0
DREQ1
Level
DREQ0
DREQ1
Edge
DREQ0
DREQ1
Level clear
t_DRQS
t_DRQS
t_DRQH
t_DRQS
Figure 25.20 DREQ0 and DREQ1 Input Timing (1)
768