SH7040 Datasheet, PDF (460/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

(9) Operation when Rrror Occurs during PWM Mode 1 Operation, and Operation is
Restarted in PWM Mode 2: Figure 12.104 shows an explanatory diagram of the case where an
error occurs in PWM mode 1 and operation is restarted in PWM mode 2 after re-setting.
1
2
3
RESET TMDR TOER
(PWM1) (1)
MTU output
TIOC*A
4
TIOR
(1 init
0 out)
5
6
PFC TSTR
(MTU) (1)
7
Match
8
9
10
11
12
Error PFC TSTR TMDR TIOR
occurs (PORT) (0) (PWM2) (1 init
0 out)
13
PFC
(MTU)
14
TSTR
(1)
• Not initialized (cycle register)
TIOC*B
• Not initialized (TIOC*B)
Port output
PEn
High-Z
PEn
High-Z
n=0 to 15
Figure 12.104 Error Occurrence in PWM Mode 1, Recovery in PWM Mode 2
1 to 10 are the same as in figure 12.102.
11. Set PWM mode 2.
12. Initialize the pins with TIOR. (In PWM mode 2, the cycle register pins are not initialized.)
13. Set MTU output with the PFC.
14. Operation is restarted by TSTR.
Note: PWM mode 2 can only be set for channels 0–2, and therefore TOER setting is not
necessary.
422