SH7040 Datasheet, PDF (453/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

(2) Operation when Error Occurs during Normal Mode Operation, and Operation is
Restarted in PWM Mode 1: Figure 12.97 shows an explanatory diagram of the case where an
error occurs in normal mode and operation is restarted in PWM mode 1 after re-setting.
MTU output
TIOC*A
1
2
3
RESET TMDR TOER
(normal) (1)
4
TIOR
(1 init
0 out)
5
6
PFC TSTR
(MTU) (1)
7
8
9
10 11 12
Match Error PFC TSTR TMDR TIOR
occurs (PORT) (0) (PWM1) (1 init
0 out)
13
PFC
(MTU)
14
TSTR
(1)
TIOC*B
• Not initialized (TIOC*B)
Port output
PEn
High-Z
PEn
High-Z
n=0 to 15
Figure 12.97 Error Occurrence in Normal Mode, Recovery in PWM Mode 1
1 to 10 are the same as in figure 12.96.
11. Set PWM mode 1.
12. Initialize the pins with TIOR. (In PWM mode 1, the TIOC*B side is not initialized. If
initialization is required, initialize in normal mode, then switch to PWM mode 1.)
13. Set MTU output with the PFC.
14. Operation is restarted by TSTR.
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