SH7040 Datasheet, PDF (479/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

(27) Operation when Error Occurs during Reset-Synchronous PWM Mode Operation, and
Operation is Restarted in Complementary PWM Mode: Figure 12.123 shows an explanatory
diagram of the case where an error occurs in reset-synchronous PWM mode and operation is
restarted in complementary PWM mode after re-setting.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
RESET TOCR TMDR TOER PFC TSTR Match Error PFC TSTR TOER TOCR TMDR TOER PFC TSTR
(RPWM) (1) (MTU) (1)
occurs (PORT) (0) (0)
(CPWM) (1) (MTU) (1)
MTU output
TIOC3A
TIOC3B
TIOC3D
Port output
PE8
PE9
PE11
High-Z
High-Z
High-Z
Figure 12.123 Error Occurrence in Reset-Synchronous PWM Mode,
Recovery in Complementary PWM Mode
1 to 10 are the same as in figure 12.121.
11. Disable channel 3 and 4 output with TOER.
12. Select the complementary PWM output level and cyclic output enabling/disabling with
TOCR.
13. Set complementary PWM. (The MTU cyclic output pin goes low.)
14. Enable channel 3 and 4 output with TOER.
15. Set MTU output with the PFC.
16. Operation is restarted by TSTR.
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