SH7040 Datasheet, PDF (301/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

11.3.11 Source Address Reload Function
Channel 2 has a source address reload function. This returns to the first value set in the source
address register (SAR2) every four transfers by setting the RO bit of CHCR2 to 1. Figure 11.25
illustrates this operation. Figure 11.26 is a timing chart for reload ON mode, with burst mode,
autorequest, 16-bit transfer data size, SAR2 increment, and DAR2 fixed mode.
DMAC
DMAC control block
Transfer
request
Reload control
4th count
RO bit = 1
CHCR2
Count signal
DMATCR2
Reload signal
Reload
signal
SAR2
(initial value)
SAR2
Figure 11.25 Source Address Reload Function
CK
Internal
address bus
Internal
data bus
SAR2 DAR2 SAR2+2 DAR2 SAR2+4 DAR2 SAR2+6 DAR2
SAR2 data
SAR2+2 data
SAR2+4 data
SAR2+6 data
SAR2 DAR2
SAR2 data
1st channel 2
transfer
SAR2 output
DAR2 output
2nd channel 2
transfer
3rd channel 2
transfer
4th channel 2
transfer
SAR2+2 output SAR2+4 output SAR2+6 output
DAR2 output
DAR2 output
DAR2 output
5th channel 2
transfer
SAR2 output
DAR2 output
After SAR2+6 output, SAR2 is reloaded
Bus right is returned one time in four
Figure 11.26 Source Address Reload Function Timing Chart
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