SH7040 Datasheet, PDF (822/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Table 26.3 Permitted Output Current Values (Conditions: V_CC = 3.0^* to 3.6V, AV_CC = 3.0^*
to 3.6V, AV_CC = V_CC ± 10%, AV_ref = 3.0^* to AV_CC, V_SS = AV_SS = 0V, T_a = –20 to
+75°C)
Item
Symbol Min Typ Max Unit
Output low-level permissible current (per pin) I_OL
—
—
2.0
mA
Output low-level permissible current (total)
∑ I_OL
—
—
80
mA
Output high-level permissible current (per pin) –I_OH
—
—
2.0
mA
Output high-level permissible current (total)
∑ (–I_OH) —
—
25
mA
Notes: To assure LSI reliability, do not exceed the output values listed in this table.
* SH7042/43 ZTAT (excluding A mask) are 3.2V.
26.3 AC Characteristics
26.3.1 Clock Timing
Table 26.4 Clock Timing (Conditions: V_CC = 3.0^* to 3.6V, AV_CC = 3.0^* to 3.6V, AV_CC = V_CC ±
10%, AV_ref = 3.0^* to AV_CC, V_SS = AV_SS = 0V, T_a = –20 to +75°C)
Item
Symbol Min
Operating frequency
f _OP
4
Clock cycle time
t _cyc
60
Clock low-level pulse width
t _CL
10
Clock high-level pulse width
t _CH
10
Clock rise time
t _CR
—
Clock fall time
t _CF
—
EXTAL clock input frequency
f _EX
4
EXTAL clock input cycle time
t _EXcyc
100
EXTAL clock low-level input pulse width t_EXL
40
EXTAL clock high-level input pulse width t_EXH
40
EXTAL clock input rise time
t _EXR
—
EXTAL clock input fall time
t _EXF
—
Reset oscillation settling time
t _OSC1
10
Standby return clock settling time
t _OSC2
10
Note: * SH7042/43 ZTAT (excluding A mask) are 3.2V.
Max
16.7
250
—
—
5
5
10
250
—
—
5
5
—
—
Unit
MHz
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ms
ms
Figures
26.1
26.2
26.3
784