SH7040 Datasheet, PDF (238/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

10.5.2 Wait State Control
Setting the WCR controls waits during address/data multiplex I/O space accesses. Software wait
and external wait insertion timing is the same as during ordinary space accesses. The timing for
one software wait + one external wait inserted is shown in figure 10.18.
T_a1
T_a2
T_a3
T_a4
T₁
T_W
T_Wo
T₂
CK
Address
CS3
AH
Read
RD
Data
Write
WRx
Data
WAIT
Address output
Address output
Data
input
Data output
Figure 10.18 Address/Data Multiplex I/O Space Access Wait State Timing (One Software
Wait + One External Wait)
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