SH7040 Datasheet, PDF (535/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

B: Bit rate (bit/s)
N: Baud rate generator BRR setting (0 ≤ N ≤ 255)
φ: Operating frequency (MHz)
n: Baud rate generator input clock (n = 0 to 3)
(See the following table for the clock sources and value of n.)
SMR Settings
n
Clock Source
CKS1
CKS2
0
φ
0
0
1
φ/4
0
1
2
φ/16
1
0
3
φ/64
1
1
The bit rate error in asynchronous mode is calculated as follows:
Error (%) =
φ × 10⁶
(N+1)
×
B
×
64
×
2n–1
2
–1 × 100
Table 14.5 indicates the maximum bit rates in the asynchronous mode when the baud rate
generator is being used for various frequencies. Tables 14.6 and 14.7 show the maximum rates for
external clock input.
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