SH7040 Datasheet, PDF (155/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Interrupt source
Interrupt source
flag clear
(by DMAC)
Interrupt source
flag clear (by DTC)
DMAC
Interrupt source
(those not designated as DMAC activating sources)
DTER
DTE clear
CPU interrupt request
DTC activation
request
DTECLR
Transfer end
Figure 6.6 Interrupt Control Block Diagram
6.6.1
Handling DTC Activating and CPU Interrupt Sources, but Not DMAC Activating
Sources
1. Either do not select the DMAC as a source, or clear the DME bit to 0.
2. For DTC, set the corresponding DTE bits and DISEL bits to 1.
3. Activating sources are applied to the DTC when interrupts occur.
4. When the DTC performs a data transfer, it clears the DTE bit to 0 and sends an interrupt
request to the CPU. The activating source does not clear.
5. The CPU clears interrupt sources with its interrupt processing routine. It then confirms the
transfer counter value. When the transfer counter value ≠ 0, it sets the DTE bit to 1 and allows
the next data transfer. If the transfer counter value = 0, it performs the necessary end
processing in the interrupt processing routine.
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