SH7040 Datasheet, PDF (828/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Table 26.7 Bus Timing (Conditions: V_CC = 3.0^*1 to 3.6V, AV_CC = 3.0^*1 to 3.6V, AV_CC = V_CC
± 10%, AV_ref = 3.0^*1 to AV_CC, V_SS = AV_SS = 0V, T_a = –20 to +75°C)
Item
Symbol Min
Max
Write address setup time
t _AS
0
—
Write address hold time
t _WR
5
—
Write data hold time
t _WRH
0
—
Read/write strobe delay time 1 t_RWD1
3^*2
27
Read/write strobe delay time 2 t_RWD2
3^*2
27
High-speed page mode CAS t_CP
t_cyc–35
—
RAS precharge time
t _RP
t_cyc× (TPC+1.5) –20 —
CAS setup time
t _CSR
10
—
AH delay time 1
t _AHD1
3^*2
40
AH delay time 2
t _AHD2
3^*2
40
Multiplex address delay time t_MAD
3^*2
35
Multiplex address hold time t_MAH
0
—
DACK delay time 1
t _DACKD1
3^*2
45
Notes: TPC is the set value of the TPC bit in DCR.
*1 SH7042/43 ZTAT (excluding A mask) are 3.2V
*2 Min values for delay time are reference values (typ)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure
26.8, 9
26.8, 9, 19
26.11–16
26.16
26.11–16
26.17, 18
26.19
26.8, 9, 11–16,19
790