SH7040 Datasheet, PDF (389/923 Pages) Renesas Technology Corp – Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

Reset-Synchronized PWM Mode Operation: Figure 12.36 shows an example of operation in the
reset-synchronized PWM mode. TCNT3 and TCNT4 operate as upcounters. The counter is cleared
when a TCNT3 and TGR3A compare-match occurs, and then begins incrementing from H'0000.
The PWM output pin output toggles with each occurrence of a TGR3B, TGR4A, TGR4B
compare-match, and upon counter clears.
TCNT3 and TCNT4
values
TGR3A
TGR3B
TGR4A
TGR4B
H'0000
Time
TIOC3B
TIOC3D
TIOC4A
TIOC4C
TIOC4B
TIOC4D
Figure 12.36 Reset-Synchronized PWM Mode Operation Example (When the TOCR’s
OLSN = 1 and OLSP = 1)
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